1. Field of the Invention
This invention relates to image and video displays, more particularly flat panel displays used as still image and/or video monitors, and methods of generating and driving image and video data onto such display devices.
2. Prior Art
Flat panel displays such as plasma, liquid crystal display (LCD), and light-emitting-diode (LED) displays generally use a pixel addressing scheme in which the pixels are addressed individually through column and row select signals. In general, for M by N pixels—or picture elements—arranged as M rows and N columns, we will have M row select lines and N data lines (see FIG. 1). For each frame, video data is loaded by applying a row-select signal to a particular row, then scanning the row column by column until the end is reached. In common LCD and LED based embodiments, the video data is written to each pixel in that row using a single or multiple data source demultiplexing a digital-analog converter output to the N columns. Each pixel is loaded with the required pixel voltage or pixel current information. Upon reaching the end of a row, the row-select signal is deselected and another row is selected in a progressive scan mode, or an interlaced scan mode. In a general active-matrix type LCD or LED embodiment, the video information is a voltage stored in a capacitor unique to the particular pixel (see FIG. 2). When the row and column signals de-select the pixel, the image information is retained on the capacitor. In contrast, in a passive-matrix type LCD embodiment, rows and columns are arranged as stripes of electrodes making up the top and bottom metal planes oriented in a perpendicular manner to each other (see FIG. 3). Single or multiple row and column lines are selected with the crossing point or points defining the pixels which have the instantaneous video information. In such a case, either the row or column signal will have a voltage applied which is proportional to the pixel information. In a light-emitting-diode display type embodiment in the passive matrix approach, the information is an instantaneous current passing through the pixel LED which results in the emission of light proportional to the applied current, or, in embodiments using fixed current sources, proportional to application time—which is also known as pulse width modulation. In all these display types mentioned, the amount of data required to drive the screen pixels is substantial. The total information conveyed to the display arrangement per video frame is then given as M×N×3× bit-width, where the factor 3 comes from the three basic colors constituting the image, i.e. red, green and blue, and the bit-width is determined from the maximum resolution of the pixel value. Most common pixel value resolution used for commercial display systems is 8 bits per color. For example, in a VGA resolution display, the total information needed to convey will be 640×400×3×8 equal to 6 Mbits per frame of image, which is refreshed at a certain frame refresh rate. The frame refresh rate can be 24, 30, 60, etc. frames per second (fps). The faster rate capability of the screen is generally used to eliminate motion blurring which occurs in LCD type displays, in which screen refresh rates of 120 or 240 fps implementations can be found in commercial devices. For a gray-scale image, the information content is less by a factor of three since only the luminance information is used.
Video and still images are generally converted to compressed forms for storage and transmission, such as MPEG2, MPEG4, JPEG2000 etc. formats and systems. Image compression methods are based on orthogonal function decomposition of the data, data redundancy, and certain sensitivity characteristics of the human eye to spatial and temporal features. Common image compression schemes involve the use of Direct Cosine Transform as in JPEG or motion JPEG, or Discrete Walsh Transform. In addition, video compression may involve skipping certain frames and using forward or backward frame estimation, skipping color information, or chroma subsampling in a luminance-chrominance (YCrCb) representation of the image etc. A video decoder is used to convert the spatially and temporally compressed image information to row and column pixel information in the color (RGB) representation to produce the image information, which will be for example at 6 Mbits per frame as in VGA resolution displays. However, from an information content point of view, much of this video information is actually spatially redundant as the image had originally been processed to a compressed form, or it has information content which the human eye is not sensitive to. All these techniques pertain to the display system's components in the software or digital processing domain, and the structure of the actual optical display comprised of M×N pixels is not affected by any of the techniques used for the video format, other than the number of pixels and frame rate.
Prior art in the field does not address image compression and decompression techniques directly. Data is generally made available on a pixel-by-pixel basis, with which the video system displays at a certain refresh rate. Image and/or video compression is generally applied to the transmission, storage and image reconditioning of data for the display (as in U.S. Pat. No. 6,477,279). Multiple line addressing in passive matrix displays is also an established technique (as in Lueder, E., “Liquid Crystal Displays—Addressing Schemes and Electro-Optical Effects”, John Wiley & Sons 2001, pp. 176-194, or U.S. Pat. No. 6,111,560,). Time-domain Walsh function based orthogonal waveforms are applied to column and rows such that crossing points in the row and columns will generate shades of gray through amplitude modulation as desired. This is in contrast to employing two-dimensional orthogonal basis function expansions used in video and image compression.
The present invention may have various modifications and alternative forms from the specific embodiments depicted in the drawings. These drawings do not limit the invention to the specific embodiments disclosed. The invention covers all modifications, improvements and alternative implementations which are claimed below.